The ever-increasing importance of electronics in automobiles brings with it a growing challenge and need for low-cost, reliable electronic systems and subsystems that require input-output devices that interface with sensors and actuators. These systems and subsystems are not isolated, and must communicate with each other.
Historically, automotive electronics have been built up using discrete, smaller integrated circuits. They relied on proprietary, dedicated wire communication schemes, at least for many sensor systems, and directly wired power outputs to the actuators. This led to large printed-circuit boards (PCBs), large engine-control unit (ECU) housing sizes, and excessive wiring bundles. Wiring brings with it other problems since it consumes space, adds weight and expense, is subject to the vehicle's electromagnetic noise, and can be difficult to trouble shoot and maintain.
Fortunately, advances in vehicle-networking standards and mixed-signal semiconductor processes are addressing these issues and introducing new possibilities to distribute intelligent systems throughout a vehicle. The trend in vehicle-networking standardization includes the wide adoption of Controller Area Network (CAN) and the Local Interconnect Network (LIN) architecture, now in version 2.1.
These network standards are providing a balance between performance and cost optimization across automotive systems. CAN provides a high-speed network for chassis, power-train and body-backbone communications, while LIN answers the need for a simple network for sensor and actuator subsystems that reduces cost and improves robustness through standardization. The wide use of CAN and the availability of LIN coincides with advances in mixed-signal semiconductor-process technologies that can bring together all the functionality needed for smaller automotive systems onto a single integrated circuit (IC), or a few ICs for more advanced systems.
While LIN was originally targeted for the vehicle's body electronics, it is proving its value in new ways with many implementations outside of body electronics. Among the automotive-electronic bus standards available, LIN provides the best solution for the communication needs of most sensors and actuators which are normally dedicated to a single system. They can be viewed as subsystems and are well served by LIN, which has been defined to fill a sub-network role in the vehicle. The maximum LIN specified data rate of twenty kilobits per second (kbps) is sufficient for most sensors and actuators. LIN is a time-triggered, master-slave network, eliminating the need for arbitration among simultaneously reporting devices. It is implemented using a single wire communications bus, which reduces wiring and harness requirements and thus helps save weight, space and cost.
Defined specifically for low-cost implementation of vehicle sub-network applications by the LIN Consortium, the LIN standard aligns well to the integration capabilities of today's mixed-signal semiconductor processes. The LIN protocol achieves significant cost reduction since it is fairly simple and operates via an asynchronous serial interface (UART/SCI), and the slave nodes are self-synchronizing and can use an on-chip RC oscillator instead of crystals or ceramic resonators. As a result, silicon implementation is inexpensive, making LIN very suitable for the mixed-signal process technologies typically used to manufacture signal-conditioning and output ICs for automotive subsystems.
The LIN master node is normally a bridge node of the LIN sub-network to a CAN network, and each vehicle will typically have several LIN sub-networks. The master LIN node has higher complexity and control, while the slave LIN nodes are typically simpler, enabling their integration in single IC subsystems. Through the use of standardized vehicle-networking architectures, it is possible to build a feature- and diagnostic-rich system that requires only three wires (LIN, battery and ground)
For obvious reasons of reliability and safe operation a very high immunity for both ESD (Electro Static Discharge) and EMI (Electro Magnetic Interference) is required for all the LIN modules. This high ESD and EMI immunity specially applies to the pins of a LIN module that are connected to the external world (e.g., battery pin, LIN pin, etc.)
The pins of a LIN module that are connected to the system (external world) are highly exposed to ESD discharge when the module is handled or plugged into the system. A LIN module must be able to be safely installed or removed by any one. Therefore the ESD immunity needs to be very high (greater than several kilovolts) for all of the LIN module pins since the standard industry rules for handling an electrical module cannot be properly enforced in the automotive industry.
In addition once installed, any pin connected to the LIN system may see a high level of interferences coming from the other communications busses and/or power supply lines. The reason is that the communications busses and power supply lines cannot be wired with efficient shielding or differential signal lines (except for CAN) for cost reasons. Therefore the high interference levels present in automobile electrical and control systems must not impact the integrity of the desired data transiting on the LIN bus.
Thus very high immunity to both ESD and EMI is required for any pin of a chip that is directly routed to the connector of a LIN module. A commonly used device for ESD protection is a grounded gate metal oxide semiconductor (GGMOS) transistor that has its gate grounded through an ESD protection resistor. A common technique to enhance the ESD robustness of the GGMOS transistor used for ESD protection of a respective external connection (pin) is to have some capacitive coupling between the drain and the gate of the GGMOS transistor protection device.
Unfortunately this ESD protection technique dramatically increases the sensitivity of the pin to noise interferences or EMI: The capacitive coupling between the drain and the gate allows high frequencies to reach the gate of the protection device and turn it on. This corrupts the desired data flow. Therefore the capacitive coupling significantly degrades a high EMI robustness. Therefore, standard ESD protection techniques are not well suited to achieve a high noise and interference immunity for EMI and the like.
Referring to FIGS. 1 and 2, depicted are a schematic block diagram and a more detailed circuit diagram of conventional ESD and EMI optimization circuits. The integrated circuit 100 comprises, for example, a circuit function 106 coupled through a driver 104a which may be an open drain transistor, a tri-state driver, etc. and through a receiver 104b which may be a level detector with external pins 118 and 222. The receiver 104b and/or driver 104a is/are also coupled to the signal ground 220 which is connected to the external ground or common connection 222 that may be located on an integrated circuit package of the integrated circuit device 100. The integrated circuit device 100 may be used for example but is not limited to LIN module implementation.
The I/O connection 118 is protected by the ESD protection circuit 108 that comprises a metal oxide semiconductor (MOS) device 224 in a grounded gate configuration and is used as an ESD protection device. The ESD protection MOS device 224 source is coupled to the ESD ground or common 120, the drain is coupled to the I/O connection 118 to be protected, and the gate is returned to the ESD ground or common 120 through a gate resistor 226. The ESD ground or common 120 may be further coupled to the external ground or common connection, e.g., connection 222.
The ESD enhancement capacitor 112 when coupled between the source and gate of the ESD protection MOS device 224 will improve ESD protection and reduce the snap back voltage of the MOS device 224. The MOS device 228 will normally be off when substantially no voltage is present on its gate, thereby allowing the ESD enhancement capacitor 112 to be coupled between the source and gate of the MOS device 224, whereby the ESD robustness is maximal. This occurs when no high frequency EMI signal/perturbation is present, e.g., when the LIN part is out of the system or there is substantially no EMI signal/perturbation present. The Data signal is much lower in frequency than the EMI signal/perturbation (noise) and is thereby blocked by the HPF 116, so only when the high frequency EMI noise is present will the MOS device 228 be turned on.
A low value resistance 230 may also be coupled in series with the ESD enhancement capacitor 112. When a voltage is applied to the gate of the switching MOS device 228, the ESD enhancement capacitor 112 is effectively bypassed to the ESD ground or common 120, thereby removing any influence that it may have on the MOS device 224. The low value resistance 230 improves the efficiency of the switching (bypassing) MOS device 228.
ESD capacitor control 110 decouples the ESD enhancement capacitor 112 from the gate and/or drain of the MOS device 224. The ESD capacitor control 110 may also be an ESD capacitor attenuator by operating the MOS device 228 in its linear range and not as a switch. The attenuation becomes a function of the resistance value of the resistor 230 and the equivalent resistance of the MOS device 228. Thus the MOS device 228 may be used to adjust the drain-to-gain coupling of the ESD enhancement capacitor 112 so that proportional ESD protection may be provided according to the strength of the EMI signal on the I/O connection 118. So that the attenuation adapts to the EMI level and the drain-to-gate capacitive coupling is always maintained to a level that prevents the ESD protection MOS device 224 from being undesirably turned on.
The voltage applied to the gate of the switching device 228 is supplied by the signal amplitude detector 114. The signal amplitude detector 114 may comprise a signal rectifying diode 238, a low pass filter resistor 234 and a low pass filter capacitor 232. The high-pass filter 116 may comprise a coupling/high-pass filter capacitor 126 and a load/high-pass filter resistor 236. The high-pass filter 116 lets the perturbation (high frequency) signal reach the input of the signal amplitude detector 114, but blocks the data (low frequency) signal. The order of the high-pass filter 116 depends on the difference between the lowest EMI frequency that needs to reach the input of the signal amplitude detector 114 and the maximum data frequency. According to the teachings of this disclosure, the minimum EMI frequency needing to be detected by the signal amplitude detector 114 may be 1 MHz (HF) while a maximum data rate of 20 Kbaud induces, for example, a maximum data frequency of 10 KHz (LF). Therefore a first order high-pass filter 116 is sufficient to let the EMI perturbation reach the input of the signal amplitude detector 114 while blocking the data signal. So only a EMI perturbation signal, with or without a data signal present, will pass to the signal amplitude detector 114 from the HPF 116. If there is substantially no EMI perturbation signal (HF) present, even if a strong data signal (LF) is present, the signal amplitude detector 114 will not activate the ESD capacitor control 110. Thus the capacitor 112 remains in the ESD circuit during reception of the data signal when there is substantially no EMI perturbation noise present. However, if a strong EMI signal is superimposed on a data transmission/reception, the EMI signal will be detected and the capacitor 112 will be decoupled to prevent or substantially reduce possible data corruption.
When a perturbation signal, e.g., a pulse train of on and off voltages, on the I/O connection 118 is coupled through the high-pass filter 116 to the signal amplitude detector 114, the diode 238 rectifies the received signal to produce a pulsating direct current (DC) voltage that is smoothed and filtered in the low pass filter comprising the resistor 234 and capacitor 232. The low pass filter introduces a delay from first detection of the received signal to generating the control voltage for the gate of the switching MOS device 228. This delay is of no consequence since the delay is much shorter than the pulse duration width of data signals normally processed by the circuit function 106 and either transmitted or received at the I/O connection 118.
Bipolar transistor 240 further improves operation of the ESD capacitor control 110 by reducing the equivalent switch resistance. The bipolar device 240 reduces, by a factor of Beta (Beta is the current gain of the bipolar device 240), the resistance of the switching device. Thereby achieving a low switching resistance in a small die area. Moreover the non-linear characteristic of the bipolar device 240 induces a rectifying effect that adds a negative DC component on the voltage applied to the gate of the ESD protection device 224. This negative DC component on the voltage applied to the gate of the ESD protection device 224 helps to put it into cutoff. However, introducing the bipolar device 240 adds a Vbe (0.7 volt) bias voltage in series with the equivalent resistance of the switch. Therefore this technique can only be applied with an ESD MOS device 224 having a threshold voltage higher than the Vbe voltage of the bipolar device 240. The lower limit for the threshold voltage of the MOS device 224 is in the range of 1 volt. However, for such a threshold voltage, devices 228 and 240 need to be very strong and thus very wide. Thus a threshold in the range of 1.5V or more will be preferred for the MOS device 224.
The delay introduced by the low pass filter (resistor 234 and capacitor 232) of the signal amplitude detector 114 allows good protection in case of an ESD event. An ESD event is a transient that contains many high frequencies. Therefore a voltage is built up at the output of the signal amplitude detector 114 after an ESD event. Without the signal amplitude detector 114 delay, this voltage would build up instantaneously and the capacitive coupling through the ESD enhancement capacitor 112 would thereby be substantially bypassed. But the ramping time in the case of an ESD event is in the nanosecond (ns) range while the delay of the low-pass filter is in the range of hundreds of nanoseconds. Therefore the ramping edge of an ESD event is coupled unaffected to the gate of the ESD protective MOS device 224. So the triggering threshold of the ESD protective MOS device 224 remains unchanged. This means that the ESD protection reacts exactly the same way as the basic capacitive coupling technique discussed more fully hereinabove. Or in the case of varying the influence of the ESD enhancement capacitor 112 on the ESD protection MOS device 224 in proportion to a signal detected by the amplitude detector 114 will thereby always maintain a level that prevents the ESD protection MOS device 224 from being undesirably turned on.
This conventional protection circuit requires two separate AC couplings through capacitors 112 and 126. Furthermore, a medium or high voltage threshold (>1.5V) ESD device is needed for the ESD transistor as explained above as well as a very fast PNP transistor 240. Certain processes in semiconductor manufacturing may not allow to create such devices.